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电子信息工程专业英语论文

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电子信息工程专业英语论文

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我自己翻译的,你参考着看哈~~/========================================================/也就是说,每个采样点携带的信息很大程度上与相邻采样点是重复的。人们已经开发出了数十种DSP算法,能够将数字化的语音信号转化成需要较低比特率的数据流。这些被称为数据压缩算法。匹配解压缩算法被用来将信号还原为其原始形式。这些算法在压缩程度和由此产生的声音质量上各不相同。通常,将数据率从64kb/s降低为32kb/s,声音质量几乎没有损失。当数据率压缩到8kb/s时,声音很明显受到影响,但仍旧适用于长途电话网络。最高可以实现将数据率压缩到2kb/s,这会导致声音高度扭曲,但在某些应用如军事通信上仍旧适用。回声控制回声在远距离电话通信中是一个很严重的问题。当你在电话的一端讲话时,一个代表你声音的电信号传递到相连的接收器,同时这个信号的一部分返回,成为了回音。如果连接是在几百英里以内,收到回声所用的时间只有几个毫秒。人耳已经习惯了听到这些有着很短延迟时间的回声,这样听到的声音是正常的。随着距离的增加,回声的影响变得更加引人注意和不可忽视。在洲际通信中,延迟可能会有几百个毫秒,那会特别令人反感。数字信号处理中,通过测量返回的信号并产生一个适当的反信号来解决这样的问题。这种技术也可以让使用扬声器的人一边听一边讲话,而不用受声音反馈(啸叫)的干扰。它也可以被用来减少环境噪音,通过产生一个反信号来削弱噪声。音频处理人类的两个主要感官是视觉和听觉。相应的,大多数的DSP与图像和音频处理相关。人们既听音乐又听演讲。DSP在这两方面都产生了革命性的影响。音乐从音乐家的麦克风到高保真音响,走过了不同寻常的道路。数据数字化很重要,它防止了与模拟存储相伴的退化等问题的出现。对于这一点,曾经比较过录音带和光盘的音乐质量的人很清楚。

电子信息工程专业英语文献

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你可以在google 学术里去搜索你要的论文,你可以把你想要搜的关键词翻译成英文的,然后在google学术里搜索,有些是可以下载的!因为我经常用!希望被采纳!

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电子信息专业论文英语

A Low-Cost and Low-Power CMOS Receiver Front-End for MB-OFDM Ultra-Wideband Systems要该文全文,更换别的论文,或要中英文对照都可以找我Mahim Ranjan, Member, IEEE, and Lawrence E Larson, Fellow, IEEE0Abstract—This paper presents an RF receiver front-end for MB-OFDM-based ultra-wideband (UWB) The receiver occupies only 35 in a 18 CMOS process and consists of a low-noise amplifier, downconverter and a bandpass There are no on-chip inductors and the receiver requires no off-chip matching The measured receiver gain is 21 dB, noise figure is less than 6 dB, input IIP3 is 6 dBm, and the receiver consumes 5 mA from a 3 V The receivercovers all the MB-OFDM bands from 1 to 8 GHIndex Terms—CMOS, distortion, OFDM, receiver, ultra wideband, UWBI INTRODUCTIONULTRA-WIDEBAND (UWB)multi-band orthogonal frequency-division multiplexing (MB-OFDM) systems have been proposed as an emerging solution to wireless communicationapplications requiring high data rates (up to 480 Mb/s) over short In one proposed version [1], the carrier, with a bandwidth of 528 MHz, can hop to one of 14 channels(2904+528n,n=123…14), divided into four groups of three channels and one group of two This representative time-frequency interleaving for a Group 1-only systemis depicted in F Design of a receiver for such a systempresents many challenges due to the wide bandwidth of the RF front- However, to assure the widest possible adoption, RF portions of these systems should consume little DC power and die area, and be implemented in a standard CMOS These last requirements argue against the use of on-chip inductors wherever Since theUWBfront-end intrinsically possesses a wide bandwidth, it is open to reception of undesired narrowband signals such as 11 a/b/g and the recently proposedWiMAX [2] systems, as shown in F Although OFDM systems are less susceptible to relatively narrowband jammers, nonlinearities in the receiver can result in jammer cross-modulation with wideband input signals, resulting in reduced signal-to-noise ratio (SNR) and a degradation in system performance [3] In addition, received wideband signals (from other UWB transmitters) can intermodulate and the resulting products can land in a desired Since the system is inherently wideband, harmonic distortion of a single unwanted UWB transmitter can also produce in-band distortion products and reduce the SNR For the system to successfully operate in such a hostile environment, the linearity specifications of the receiver need to include these distortion F Representative time-frequency interleaving pattern of a Group 1MB-OFDM signal [1] F Representative spectrum at an MB-OFDM receiver This paper describes a UWB heterodyne receiver front-end that is designed to minimize the effects of wideband jammers from a variety of undesired sources [4] In addition, the receiver is designed to minimize silicon area, so on-chip inductors are not The receiver architecture is presented in Section II Specifications for the receiver are derived in Section III Detailed block design is presented in Sections IV–VI Layout and packaging of the chip is discussed in Section VII Measured results are presented in Section VIII, followed by a conclusion in Section IXII RECEIVER ARCHITECTUREWhen it comes to designing a low-power and low-cost receiver, the traditional choice is a direct conversion However, a direct conversion UWBreceiver, while attractive for power consumption and simplicity of its local oscillator (LO) scheme [5], [6], has a well-known problem of time-varying DC offset and sensitivity to narrowband A DC offset at the output of the receiver can degrade the SNR of the digitized baseband In addition, it can introduce second-order distortion in the baseband signal, which further degrades the SNR A Low-Cost and Low-Power CMOS Receiver Front-End for MB-OFDM Ultra-Wideband SystemsMahim Ranjan, Member, IEEE, and Lawrence E Larson, Fellow, IEEE0Abstract—This paper presents an RF receiver front-end for MB-OFDM-based ultra-wideband (UWB) The receiver occupies only 35 in a 18 CMOS process and consists of a low-noise amplifier, downconverter and a bandpass There are no on-chip inductors and the receiver requires no off-chip matching The measured receiver gain is 21 dB, noise figure is less than 6 dB, input IIP3 is 6 dBm, and the receiver consumes 5 mA from a 3 V The receivercovers all the MB-OFDM bands from 1 to 8 GHIndex Terms—CMOS, distortion, OFDM, receiver, ultra wideband, UWBI INTRODUCTIONULTRA-WIDEBAND (UWB)multi-band orthogonal frequency-division multiplexing (MB-OFDM) systems have been proposed as an emerging solution to wireless communicationapplications requiring high data rates (up to 480 Mb/s) over short In one proposed version [1], the carrier, with a bandwidth of 528 MHz, can hop to one of 14 channels(2904+528n,n=123…14), divided into four groups of three channels and one group of two This representative time-frequency interleaving for a Group 1-only systemis depicted in F Design of a receiver for such a systempresents many challenges due to the wide bandwidth of the RF front- However, to assure the widest possible adoption, RF portions of these systems should consume little DC power and die area, and be implemented in a standard CMOS These last requirements argue against the use of on-chip inductors wherever Since theUWBfront-end intrinsically possesses a wide bandwidth, it is open to reception of undesired narrowband signals such as 11 a/b/g and the recently proposedWiMAX [2] systems, as shown in F Although OFDM systems are less susceptible to relatively narrowband jammers, nonlinearities in the receiver can result in jammer cross-modulation with wideband input signals, resulting in reduced signal-to-noise ratio (SNR) and a degradation in system performance [3] In addition, received wideband signals (from other UWB transmitters) can intermodulate and the resulting products can land in a desired Since the system is inherently wideband, harmonic distortion of a single unwanted UWB transmitter can also produce in-band distortion products and reduce the SNR For the system to successfully operate in such a hostile environment, the linearity specifications of the receiver need to include these distortion

HDB3 yards ( third-order high-density dual polarity yards) is the most commonly used in modern transmission system is one of the MaXing, is widely This study is based on the main content of the HDB3 yards encoder CPLD device First of HDB3 yards and CPLD application and research status were introduced, This paper used to MaxPlusII and VHDL language software, Finally HDB3 yards are analyzed in detail by VHDL language encoding principle and realization Based on the principle of coding HDB3 yards, the paper analyzes the design scheme of HDB3 code design mainly divided into three coder realized module ( insert V module, modeling and realize the modeling and realization, B module modeling and realize polarity transform module) After completion, the software design in the simulation, MaxPlus2 test results and the design idea of early, so right, completed based on simulation HDB3 code design of CPLD

PickHDB3 yards ( third-order high-density dual polarity yards) is the most commonly used in modern transmission system is one of the MaXing, is widely This study is based on the main content of the HDB3 yards encoder CPLD device First of HDB3 yards and CPLD application and research status were introduced, This paper used to MaxPlusII and VHDL language software, Finally HDB3 yards are analyzed in detail by VHDL language encoding principle and realization Based on the principle of coding HDB3 yards, the paper analyzes the design scheme of HDB3 code design mainly divided into three coder realized module ( insert V module, modeling and realize the modeling and realization, B module modeling and realize polarity transform module) After completion, the software design in the simulation, MaxPlus2 test results and the design idea of early, so right, completed based on simulation HDB3 code design of CPLD Keywords: HDB3, VHDL, Polarity transformation

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